In general, the present invention relates to a technology for preventing flickering, which might be generated in an operation based on interlaced scanning in display of image information which is to be displayed using a non-interlace scanning technique. More particularly, the present invention relates to an effective technology applied to a graphic processor for displaying computer data and for controlling rendering operations, as well as to a data processing system employing such a graphic processor.
A graphic processor employed in a computer apparatus, such as a personal computer, supplies image data generated by an application program to a display device, such as a video signal synchronized to the display timing of the display device. The computer apparatus controls the display of the image data by adopting a non-interlace scanning system. In the non-interlace scanning system, interlaced scanning of scanning fields is not carried out. Instead, all scanning lines are scanned in each vertical scanning period. Thus, a screen can be created in one vertical scanning period. As a result, a high display quality with little flickering can be obtained.
In an interlaced scanning system such as used in a conventional television, receiver on the other hand, scanning lines are divided into even and odd fields. In each vertical scanning period, only one of the even and odd fields are scanned. That is, interlaced scanning of every other scanning line is carried out. As a result, one complete screen is created in two vertical scanning periods.
As described above, in the non-interlace scanning system, all scanning lines are scanned in each vertical scanning period. Thus, the vertical-direction position of a scanned scanning line is the same for all screens. In the interlaced scanning system, however, a screen comprising only even fields and a screen comprising only odd fields are displayed in alternate vertical scanning periods. Thus, the vertical-direction position of a scanned scanning line appearing on the current screen is shifted from the immediately preceding and succeeding screens by one scanning-line pitch, respectively. As a result, if the difference in image information, such as the difference in brightness and color, between adjacent scanning lines in the interlaced scanning system is big, flickering is generated easily between a screen comprising only even fields and a screen comprising only odd fields.
In addition, there is also a need to display high-resolution image data produced by a personal computer on an ordinary television set by converting the data into a video signal of typically the NTSC (National Television System Committee) system. If such computer image data is displayed on a television set by merely changing the scanning system, however, a flickering will be generated which is not seen in the case of displaying the same data on a display device using the non-interlace scanning system. This is because, in comparison with a natural image produced by a television broadcasting system, a video camera or a VTR/VCR (video tape recorder/video cassette recorder), for example computer image data mainly comprises lines of characters and shade patterns, exhibiting a big difference in image information between any two adjacent upper and lower scanning lines. For example, assume that pixels of three adjacent upper, middle and lower scanning lines at positions on the same vertical column are black, white and black, providing big differences in brightness among the adjacent pixels. In this case, since two adjacent black and white pixels are displayed on two different screens, flickering is seen.
Technologies for eliminating such flickering have been disclosed in Japanese Patent Laid-open Nos. Hei 6-83299, Hei 7-274086, Hei 6-46299 and Hei 8-317311. While there are differences in detail among these technologies, in the case of either of the technologies, a display control system is provided with a plurality of line buffers each used for storing image information of a scanning line. More particularly, the same plurality of line buffers are used for storing image information of the current scanning line and pieces of information of preceding scanning lines. Image information of the current scanning line is corrected by using the pieces of information of preceding scanning lines in order to prevent differences in image information among the scanning lines from becoming big.
In order to be capable of operating synchronously with a display timing, a line buffer must be implemented by an SRAM (Static Random-Access Memory) having a high speed. According to what has been disclosed in the documents cited above, a plurality of line buffers are required. Thus, a graphic control circuit composed of a large number of line buffers inevitably increases the cost of the display control circuit. In addition, according to the technologies adopted by the display control system for eliminating flickering, correction is carried out in an operation to output image data, after processing of the image data has been completed and the data has been stored in a frame buffer, synchronously with display scanning. In the prior technologies, processing to eliminate flickering by consideration of a source image prior to the rendering process is not carried out. In addition, with the prior technologies, freedom to arbitrarily determine the degree of processing is not taken into consideration.
It is thus an object of the present invention to provide a graphic processor and a data processing system which are capable of reducing a difference in image information between any two adjacent scanning lines without the need to newly add a line buffer.
It is another object of the present invention to provide a graphic processor and a data processing system which are capable of preventing flickering which might be generated in the display of image information produced originally for a non-interlace scanning display device by adopting the interlaced scanning technique, without the need to newly add a line buffer.
It is still another object of the present invention to provide a graphic processor and a data processing system which are capable of freely carrying out a processing to eliminate flickering of the screen caused by differences in resolution among pieces of image information in the display of the pieces of image information by overlaying one piece over another using the interlace scanning technique, without the need to newly add a line buffer.
It is a further object of the present invention to provide a low-cost graphic processor having an instruction for eliminating flickering.
It is a further object of the present invention to provide a data processing system capable of carrying out image-data processing to eliminate flickering by using a frame buffer memory.
The above and other objects, as various well as novel characteristics of the present invention will become more apparent from a study of the description provided in this specification with reference to the accompanying drawings.
Representative overviews of the present invention as disclosed in this application will be explained briefly as follows.
As shown in FIG. 1, a graphic processor 1 according to a first aspect of the present invention includes a rendering control circuit 2 for controlling an operation to draw image data on a memory unit 4 used as a frame buffer in accordance with a result of interpretation of a command, and a display control circuit 3 for controlling an operation to read out image data from the memory unit 4 in a scanning direction synchronously with a display scanning timing. Pieces of image data of source image information are laid out in the memory unit 4 to form a pixel-data matrix corresponding to a matrix of pixels with rows of the pixel-data matrix oriented in parallel to the scanning direction and columns thereof oriented perpendicularly to the scanning direction. The rendering control circuit 2 is capable of carrying out blend processing for correcting the source image information by execution of weighted averaging on any particular piece of image data of the source image information and pieces of image data on rows of the pixel-data matrix adjacent to a row of the particular piece of image data and on the same column of the pixel-data matrix perpendicular to the scanning direction as the particular piece of image data. A command or an instruction for carrying out the blend processing is defined for the graphic processor 1. By the execution of weighted averaging involving adjacent pieces of image data, it is possible to reduce a difference in image information between adjacent scanning lines, which is big in some cases. Such reduction of a difference is implemented by letting the rendering control circuit 2 merely read out pieces of data from the memory unit 4 sequentially, one piece after another, in a direction perpendicular to the scanning direction and to carry out the weighted averaging. Thus, it is not necessary to newly provide the display control circuit and, in particular, the rendering control circuit, with an additional storage device, such as a line buffer as described earlier.
As a result, a difference in image information between any two adjacent scanning lines can be reduced without the need to add a line buffer. Thus, image information completing the weighted averaging described above can be displayed by adopting the interlaced scanning system without causing undesired flickering.
By providing a graphic processor with an instruction for eliminating flickering, it is possible to present a low-cost graphic processor capable of eliminating flickering.
A graphic processor according to a second aspect of the present invention includes a rendering control circuit for controlling an operation to draw image data on a memory unit in accordance with a result of interpretation of a command, and a display control circuit for controlling an operation to read out image data from the memory unit in a scanning direction synchronously with a display scanning timing, wherein pieces of image data of source image information are laid out in the memory unit to form a pixel-data matrix corresponding to a matrix of pixels, with rows of the pixel-data matrix oriented in parallel to the scanning direction and columns thereof oriented perpendicularly to the scanning direction. The rendering control circuit is capable of executing a blend-processing command having: source specifying information for specifying a location of a piece of image data composing the source image information in the pixel-data matrix; command information for specifying blend processing for correcting the source image information by execution of weighted averaging on a particular piece of image data of the source image information indicated by the source specifying information and pieces of image data on rows of the pixel-data matrix adjacent to a row of the particular piece of image data and on the same column of the pixel-data matrix perpendicular to the scanning direction as the particular piece of image data; and destination specifying information for specifying a location at which a piece of image data obtained as a result of the weighted averaging is to be stored.
The blend-processing command makes the rendering control circuit capable of carrying out blend processing similar to a read-modify-write operation by execution of the steps of: reading out a particular piece of image data of the image information stored at a location in the pixel-data matrix corresponding to the pixel matrix specified by the source specifying information from the memory unit; performing weighted averaging on the particular piece of image data read out from the memory unit and pieces of image data on rows of the pixel-data matrix adjacent to a row of the particular piece of image data and on the same column of the pixel-data matrix perpendicular to the scanning direction as the particular piece of image data; and storing a result of the weighted averaging back into the memory unit. As a result, it is not necessary to newly provide the display control circuit and, in particular, the rendering control circuit, with an additional storage device, such as a line buffer, and it is possible to reduce the difference in image information between adjacent scanning lines, which is big in some cases.
Since the source specifying information and the destination specifying information of the blend-processing command can be set arbitrarily, it is possible to determine any arbitrary area in the display area subjected to the weighted averaging with a high degree of freedom. In an operation to overlay an image produced by a computer over a natural image, for example, it is possible to carry out the weighted averaging only on the image produced by the computer. That is, blend processing can be carried out only on a necessary portion of image information, allowing wasted processing to be eliminated. As a result, blend processing can be carried out in a short period of time, while still providing an improved picture quality.
The blend-processing command can be further provided with first-attribute information for specifying whether adjacent pieces of image data subjected to the weighted averaging on the same column perpendicular to the scanning line as the particular piece of image data are those on rows preceding and succeeding the row of the particular piece of image data, those on only rows preceding the row of the particular piece of image data or those on only rows succeeding the row of the particular piece of image data. It is quite within the bounds of possibility that the image blurs adversely as a result of excessive weighted averaging. It is thus necessary to select a degree to which the weighted averaging is to be carried out on source data subjected to the blend processing in accordance with characteristics of the source data. By doing so, a flicker free picture with a high quality can be obtained.
In addition, the blend-processing command can be further provided with second-attribute information for specifying that image data completing the weighted processing be stored only in an area that is included in a clipping area and is specified by the destination specifying information. Thus, a clipping area can also be used in conjunction with the destination specifying information. As a result, the operability of the blend processing can be improved, allowing the graphic processor to be used more in a way desired by the user.
A data processing system according to a third aspect of the present invention comprises a central processing unit, a graphic processor, a memory unit used as a frame buffer and a display device. The graphic processor includes a rendering control circuit for controlling an operation to draw image data on a memory unit in accordance with a result of interpretation of a command issued by the central processing unit, and a display control circuit for controlling an operation to read out image data from the memory unit in a scanning direction synchronously with a display scanning timing, wherein pieces of image data of source image information are laid out in the memory unit to form a pixel-data matrix corresponding to a matrix of pixels with rows of the pixel-data matrix oriented in parallel to the scanning direction and columns thereof oriented perpendicularly to the scanning direction. The rendering control circuit is capable of carrying out blend processing similar to a read-modify-write operation by execution of the steps of: reading out a particular piece of image data of the image information stored at a location in the pixel-data matrix corresponding to the pixel matrix specified by source specifying information from the memory unit; performing weighted averaging on the particular piece of image data read out from the memory unit and pieces of image data on rows of the pixel-data matrix adjacent to a row of the particular piece of image data on the same column of the pixel-data matrix perpendicular to the scanning direction as the particular piece of image data; and storing a result of the weighted averaging back into the memory unit. As a result, it is not necessary to newly provide the display control circuit and, in particular, the rendering control circuit, with an additional storage device, such as the line buffer, and it is possible to reduce the difference in image information between adjacent scanning lines, which is big in some cases.
The central processing unit is capable of issuing a blend-processing command requesting the graphic processor to carry out the blend processing. The blend-processing command can be provided with: source specifying information for specifying a location of a piece of information data composing the source image information in the pixel-data matrix; command information for specifying blend processing for correcting the source image information by execution of weighted averaging on a particular piece of image data of the source image information indicated by the source specifying information and pieces of image data on rows of the pixel-data matrix adjacent to a row of the particular piece of image data and on the same column of the pixel-data matrix perpendicular to the scanning direction as the particular piece of image data; and destination specifying information for specifying a location at which a piece of image data obtained as a result of the weighted averaging is to be stored.
The blend-processing command can be further provided with first-attribute information for specifying whether adjacent pieces of image data subjected to the weighted averaging carried out by the rendering control circuit on the same column of the pixel-data matrix perpendicular to the scanning line as the particular piece of image data are those on rows of the pixel-data matrix preceding and succeeding the row of the particular piece of image data, those on only rows preceding the row of the particular piece of image data or those on only rows succeeding the row of the particular piece of image data. In addition, the blend-processing command may include second-attribute information. In this case, the rendering control circuit is provided with a clipping register containing information set therein by the central processing unit to specify a clipping area. In a first state, the second attribute information is used for specifying that image data completing the weighted processing be stored only in an area that is included in the clipping area and is specified by the destination specifying information. In a second state, on the other hand, the second attribute information is used for specifying that image data completing the weighted processing be stored only in an area specified by the destination specifying information without regard to the clipping area. As a result, it is possible to determine a degree to which processing to eliminate flickering is to be carried out by paying attention to a source image prior to the rendering. In addition, it is also possible to achieve freedom to determine whether image data completing the weighted processing be stored only in an area that is included in the clipping area and is specified by the destination specifying information, or be stored in an area specified by the destination specifying information without regard to the clipping area.
As described above, by merely providing a graphic processor with an instruction for eliminating flickering, flickering can be eliminated by adoption of a software technique. Embedded as an instruction in a graphic processor, the flickering elimination software technique can be applied to a variety of data processing systems that employ a graphic processor.